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Senior RTL Design Engineer ‑Reliability SoCs
Job in
Santa Barbara, Santa Barbara County, California, 93190, USA
Listed on 2026-02-16
Listing for:
Analog Devices
Full Time
position Listed on 2026-02-16
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
A leading semiconductor company in Santa Barbara, California, is seeking a Senior Digital Design Engineer to develop and verify RTL for mixed-signal SoCs. The role involves collaborating with cross-functional teams and requires proficiency in Verilog/System Verilog and scripting languages. Candidates should have a BS in Electrical or Computer Engineering and 3+ years of experience in ASIC/SoC design. Compensation ranges from $116,960 to $146,200, with additional benefits including medical and 401k.
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Position Requirements
10+ Years
work experience
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