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GPU Design Verification Engineer

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Intel
Full Time position
Listed on 2026-02-18
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Software Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

Job Details:

  • Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements

  • Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications

  • Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs

  • Replicates, root causes, and debugs issues in the presilicon environment

  • Finds and implements corrective measures to resolve failing tests

  • Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals

  • Documents test plans and drives technical reviews of plans and proofs with design and architecture teams

  • Maintains and improves existing functional verification infrastructure and methodology

  • Participates in the definition of verification infrastructure and related TFMs needed for functional design verification

Qualifications:
  • Minimum Qualifications: Bachelor's degree in electronics, computer engineering, or related engineering with 4+ years of experience in silicon design development
  • Alternate Path: Master's degree in electronics, computer engineering, or related engineering with 3+ years of experience in silicon design development
  • At least 4 years of experience in the following:
    • Test Bench bring-up at IP level and strong programming skills in System Verilog, OVM and UVM
    • Hands on verification experience working on ASIC, CPU or GPU
    • Test Plan development experience at IP level with coverage closures
    • Coverage driven verification testbench development functional modeling and test writing
  • Preferred Qualifications: Understanding of Graphics architecture
  • Experience with industry standard frontend design and verification flows, tools, methodology
  • Experience with scripting shell, PERL, python
Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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