FPGA Engineer

Job Title:

Electrical Engineer

Location:

Santa Clara CA 95054

Duration: 03/16/2026 to 08/28/2026

Shift: [ Monday , Tuesday , Wednesday , Thursday , Friday ] What hours will the contingent worker be expected to work? 8am-4p PST

Hours per Week: 40

This role focuses on designing, developing, and supporting FPGA-based solutions for advanced robotic and medical systems. The engineer will own RTL design from architecture through validation, working hands-on across the full FPGA development lifecycle, including simulation, timing closure, hardware bring-up, and system-level debugging. The position requires close collaboration with hardware, firmware, software, and systems teams in a highly cross‑functional, regulated R&D environment to deliver reliable, safety‑critical technology.

• Designing, developing, optimizing, and maintaining FPGA RTL using Verilog/System Verilog and/or VHDL
• Supporting the full FPGA development lifecycle, including synthesis, place‑and‑route, timing closure, and bitstream generation
• Performing functional simulation, verification, and system‑level debugging
• Supporting board bring‑up, testing, integration, and validation
• Collaborating closely with hardware, firmware, software, and systems engineering teams
• Documenting design decisions, test results, and process improvements
• Participating in design reviews and regulated development activities

• 4+ years of hands‑on FPGA design and development experience
• Strong understanding of digital logic, timing analysis, and debugging
• Proficiency in Verilog/System Verilog
• Experience with FPGA tool chains such as Xilinx Vivado, Lattice Diamond, or equivalent
• Bachelor’s degree in Mechanical Engineering, Electrical Engineering, or a related scientific field
• Robotics design exposure
• Strong collaboration and communication skill.

• Prior experience in medical devices, robotics, or safety‑critical systems
• Exposure to regulated environments such as FDA, IEC, or ISO
• End‑to‑end FPGA ownership from architecture through validation
• Experience debugging real hardware issues beyond simulation
• Familiarity with high‑speed protocols such as PCIe, Ethernet, DDR, or Aurora
• Experience using simulation, verification, and hardware debug tools (logic analyzers, oscilloscopes)
• Cross‑functional collaboration with mechanical, systems, or clinical teams