Analog-Mixed Signal Design Engineer

Responsible for the design development and characterization of embedded analog circuits, such as high speed I/O, Ser Des, FIFO, CDR, PLL etc.

Responsible for the design development and characterization of embedded analog circuits, such as high speed I/O, Ser Des, FIFO, CDR, PLL etc. Design and debug experience on RTL level signal synchronization, clock tree and cross domain clock designs is a significant plus. Need to work closely with system and test engineers to develop high speed interface, package/board, and system clocks in image sensor and bridge chip products.

• Analog/Mixed-Signal design, simulation and verifications.
• High speed test with scope and BERT.
• Layout design and support. Need to get involved into layout optimizations for high speed or high precision performance directly.
• Interface verifications between analog and digital.
• IP and design spec documentations.

• Familiar with Cadence analog design/layout flow and spice/spectre
  
  MDL simulations.
• Masters of Electrical Engineering or PhD.

Annual base salary for this role in California, US is expected to be between $105,000 - $135,000. Actual pay will be determined on a number of factors such as relevant skills, education, experience, and the pay of employees in the similar role.