Senior Mixed Signal Design Validation Engineer

What You’ll Be Doing:

• Lead and drive the creation of validation test plans and test scripts for DDR I/O associated with LPDDR, GDDR, and HBM memory interfaces, ensuring all necessary analog and digital circuits are covered.
• Conduct thorough characterization of analog, digital, and mixed‑signal circuit blocks under varying conditions (process, voltage, temperature) and correlate results with simulations.
• Drive system‑level validation for memory interfaces, ensuring high‑speed performance and quality metrics meet the demanding standards required by our GPU and AI systems.
• Investigate and validate Memory I/O circuits to understand weaknesses, paving the way for circuit improvement and architecture enhancement in future products.
• Lead debugging efforts and design creative solutions to resolve unexpected bugs.
• Validate silicon performance, quality, and margins for refinement of memory interface designs.
• Develop and implement test scripts to optimize DDR I/O circuits, sub‑circuits and overall system performance.
• Work closely with multi‑functional teams—including Mixed Signal Design, PISI team, hardware, firmware, and Memory Qualification Engineering—to resolve issues and improve performance of memory interfaces.
• Develop and implement tools and scripts to enhance electrical characterization and chip bring‑up processes.
• Mentor and train new engineers on validation practices, encouraging a culture of excellence and continuous improvement.

• A BS degree or equivalent experience with 8 years or more in Electrical Engineering, Computer Engineering, or a related field.
• Solid experience in silicon bring‑up and debugging, particularly for high‑speed memory interfaces.
• Strong understanding of Memory systems and specifications.
• In‑depth technical knowledge of mixed‑signal circuits, analog, and digital systems, with a specific focus on high‑speed memory technologies.
• Strong knowledge of signal integrity and power integrity.
• Experience with lab instrumentation such as oscilloscopes, logic analyzers, spectrum analyzers, TDR, phase noise analyzers, signal generators, and BER testers.
• Strong scripting skills in Python, C, or similar languages, with experience in Git and JMP for version control and data analysis.
• Ability to work in a fast‑paced, dynamic environment that involves multiple‑chip bring‑ups and system validations.
• Strong problem‑solving skills, with a proactive and forward‑thinking approach.

• Exhibit strong expertise in measurement theory and use of test instruments, especially in the context of memory interface validation. Knowledge of other high‑speed transceiver performance is a must.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $168,000 USD–$264,500 USD for Level4, and $196,000 USD–$310,500 USD for Level
5.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.