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Sr Manager, Hardware Engineering; NetSec

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Palo Alto Networks
Full Time position
Listed on 2026-06-03
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 125000 - 150000 USD Yearly USD 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Sr Manager, Hardware Engineering (NetSec)

Our Mission

At Palo Alto Networks®, we’re united by a shared mission—to protect our digital way of life. We thrive at the intersection of innovation and impact, solving real-world problems with cutting‑edge technology and bold thinking. Here, everyone has a voice, and every idea counts. If you’re ready to do the most meaningful work of your career alongside people who are just as passionate as you are, you’re in the right place.

Who

We Are

In order to be the cybersecurity partner of choice, we must trailblaze the path and shape the future of our industry. This is something our employees work at each day and is defined by our values:
Disruption, Collaboration, Execution, Integrity, and Inclusion. We weave AI into the fabric of everything we do and use it to augment the impact every individual can have. If you are passionate about solving real‑world problems and ideating beside the best and the brightest, we invite you to join us!

We believe collaboration thrives in person. That’s why most of our teams work from the office full time, with flexibility when it’s needed. This model supports real‑time problem‑solving, stronger relationships, and the kind of precision that drives great outcomes.

Job Summary

The Hardware Engineering Manager will be responsible for overseeing a hardware design team—specifically Board Design and Signal Integrity (SI) Engineers—ensuring the successful execution of projects from early concept through production. This role requires strong leadership, technical expertise, and a commitment to instilling a quality‑focused mindset across the organization. The successful candidate will prioritize the creation and following of rigorous procedures and the implementation of AI‑based tools to achieve the highest possible quality and efficiency as early as possible in the development cycle.

Responsibilities
  • Lead, mentor, and manage a team of board design and signal integrity engineers, fostering a culture of technical excellence and quality‑first thinking.

  • Instill a quality‑focused mindset within the team, emphasizing that quality is a shared responsibility integrated into every stage of the design process.

  • Evaluate, pilot, and integrate AI‑based tools and machine learning techniques into the hardware development lifecycle to accelerate design cycles, automate routine tasks, and enhance quality.

  • Establish, document, and enforce procedures and best practices for board design and SI methodologies to ensure repeatable, high‑quality outcomes.

  • Drive "Shift Left" initiatives to identify and mitigate hardware and signal integrity risks during the earliest phases of architectural definition and simulation.

  • Oversee the entire hardware design lifecycle, from concept generation to detailed PCB design, simulation, prototyping, testing, production release, and sustaining.

  • Collaborate with other disciplines within the Hardware Design team including: PCB layout, Mechanical Design, Power Design, and Validation Test.

  • Collaborate with cross‑functional teams including ASIC/FPGA, software, operations, and product management to ensure seamless integration and product success.

  • Review and approve hardware designs, ensuring they meet strict technical specifications, quality standards, cost targets, and project timelines.

  • Create and maintain project schedules, resources, and budgets for hardware design activities.

  • Identify and implement new technologies and EDA tools to enhance design capabilities and efficiency.

  • Conduct weekly one‑on‑ones with direct reports, as well as mid‑year and year‑end performance reviews.

  • Review career development opportunities as well as individual resource loading across multiple programs.

  • Maintain a strong understanding of SI requirements, high‑speed interface solutions, testing, and validation.

  • Participate in design reviews and provide technical guidance and hardware problem‑solving expertise.

  • Participate in providing early‑on guidance to Ops Supply Chain Management.

  • Influence overall team collaboration.

Qualifications
  • Bachelor's degree in Electrical Engineering or Computer Engineering preferred.

  • Minimum of 10 plus years of experience in system‑level hardware design.

  • Minimum 5 plus years of…

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