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Applications Engineer - Semiconductor Test

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Eurofins US Network
Full Time position
Listed on 2026-06-03
Job specializations:
  • Engineering
    Electrical Engineering, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

Santa Clara, CA, USA

Full-time

Company Description

Eurofins EAG Laboratories has over 40 years experience in engineering and materials testing services. Our parent company, Eurofins Scientific, is a multi-billion‑dollar global leader in engineering and scientific services operating over 900 labs in 60 countries with 65,000 employees with a portfolio of over 200,000 validated analytical methods.

At EAG, curiosity fuels everything we do. Every analysis, every test, and every question asked in our labs helps unlock what materials and products are capable of—and what the world can build next. If you’re energized by materials science, analytical chemistry, engineering rigor, and solving problems that matter, you’ll feel right at home here.

Our scientists and engineers support industries ranging from semiconductors and advanced electronics to pharmaceuticals, medical devices, energy systems, and consumer products. Using advanced techniques in analytical chemistry, microscopy, surface analysis, and engineering sciences, we help clients solve complex challenges across the product lifecycle.

What sets EAG apart isn’t just our world‑class instrumentation—it’s our people. We’re problem solvers, collaborators, and lifelong learners who value precision, curiosity, and impact. Here, your work directly influences the safety, reliability, and performance of products used around the globe.

Job Description

We are hiring an Applications Engineer to support semiconductor device testing using Automated Test Equipment (ATE) in a production environment. This role focuses on silicon debug, yield analysis, and test program support, working closely with engineering and test operations teams to resolve issues and improve performance.

You will work hands‑on with ATE systems (e.g., Teradyne, Advantest, or similar), building on your existing experience while expanding your exposure to customer programs and production environments.

Location:

Santa Clara, CA (Onsite). Relocation assistance is not provided for this role; candidates should be able to commute to the work location.

What You’ll Do
  • Debug test failures on ATE systems
  • Analyze wafer sort and final test data to identify yield trends and issues
  • Support test program debug, correlation (bench vs ATE), and optimization
  • Partner with test floor teams to troubleshoot production issues
  • Contribute to device qualification and production readiness efforts
  • Develop and execute test plans with engineering and operations teams
  • Perform data analysis using tools such as Excel, JMP, Python, or similar
  • Document results and communicate clearly with internal teams and customers
  • Manage multiple priorities and escalate risks as needed
Eligibility and Work Authorization Requirements

This position may require access to information subject to the International Traffic in Arms Regulations (ITAR). Applicants must be U.S. Persons as defined by ITAR (e.g., U.S. Citizen, U.S. Permanent Resident, or otherwise authorized under ITAR regulations).

This role does not provide employment-based visa sponsorship.

Qualifications

What You’ll Bring

Qualifications and expectations for this role include:

Education & Experience
  • Bachelor’s degree in Electrical Engineering or related field, or equivalent practical experience
  • 3+ years of demonstrated experience in semiconductor device testing, typically gained through professional experience, internships, or hands‑on training in ATE or related environments
Technical Knowledge and Skills
  • Experience working with semiconductor ATE platforms (e.g., Teradyne, Advantest, or similar), or ability to quickly learn comparable systems
  • Exposure to wafer sort and/or final test environments
  • Ability to troubleshoot test failures, yield or performance issues, and correlation between test environments
  • Experience analyzing data using spreadsheets, statistical tools, or scripting
  • Familiarity with digital, analog, or mixed‑signal device testing concepts
  • Experience using lab equipment (oscilloscope, DMM) in support of device characterization and debug
  • Experience with test program development or debug, scripting (Python, C/C++, or similar), yield improvement or production ramp activities, and exposure to project…
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