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Senior Analog/RF Layout Engineer – End-to-End SoC Design
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-03
Listing for:
Capgemini
Full Time
position Listed on 2026-06-03
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
Capgemini is looking for an experienced Analog / RF Layout Designer in Santa Clara, California. This role involves development of complex analog layouts and integration within larger SoCs, emphasizing multiple projects and collaboration.
Candidates should have 6+ years of experience with Ser Des, ADC/DAC layouts while working in advanced technologies. This position offers a competitive compensation range of $97,700 to $203,800 annually along with a comprehensive benefits package.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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