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Senior FPGA Test Development Lead | ATE & Yield Optimizer

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Achronix Semiconductor Corporation
Full Time position
Listed on 2026-06-04
Job specializations:
  • Engineering
    Test Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 180000 USD Yearly USD 150000.00 180000.00 YEAR
Job Description & How to Apply Below
A leading fabless semiconductor company in Santa Clara, California, is seeking a Senior Manager, Test Development Engineering. The role involves leading test program development for FPGA integrated circuits, managing a team, and implementing strategies to optimize yield and cost in production test processes. Ideal candidates will have extensive experience in semiconductor test engineering, strong analytical skills, and proficiency with Advantest V93000 ATE platforms.

The company offers a competitive salary and benefits in a dynamic work environment.
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Position Requirements
10+ Years work experience
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