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SoC Interconnect Verification Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-04
Listing for:
Semiconductor Engineering
Full Time
position Listed on 2026-06-04
Job specializations:
-
Engineering
Systems Engineer, Test Engineer
Job Description & How to Apply Below
Responsibilities
- Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
- Write UVM/System Verilog code to implement the test plan, checkers, and scoreboards
- Collaborate with software teams to define and implement configurable test benches
- Work with design teams test plans, failure debug, coverage, etc.
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