Senior Analog/RF Layout Engineer SoC IPs
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-16
Listing for:
Capgemini
Full Time
position Listed on 2026-06-16
Job specializations:
-
Engineering
Electrical Engineering, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
Capgemini is seeking an experienced Analog / RF Layout Designer in Santa Clara, California, to develop and optimize complex analog layouts. The role includes responsibilities such as driving layouts from concept to tape-out, overseeing placement and routing, and applying expertise in advanced technologies.
The ideal candidate will have over 6 years of experience in analog/RF layout design and a Bachelor’s degree in Electrical Engineering. Capgemini offers comprehensive benefits including health insurance and retirement plans.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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