Physical Design Engineer ASICs; Multi‑Level
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-17
Listing for:
Itlearn360
Full Time
position Listed on 2026-06-17
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Engineering Design & Technologists, Test Engineer
Job Description & How to Apply Below
Qualcomm Technologies, Inc. is seeking Physical Design Engineers for multiple levels in Santa Clara, California. The position requires innovation in chip design using advanced tools, focusing on complex, low-power designs. Candidates should have experience with ASIC design and verification.
Preferred qualifications include familiarity with Cadence Innovus and Synopsys tools. A Bachelor's or higher degree in engineering is required. Pay ranges from $140,000 to $229,800, with additional competitive bonus programs and benefits.
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