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Senior ASIC Timing & Closure Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-18
Listing for:
NVIDIA Gruppe
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Quality Engineering, Systems Engineer
Job Description & How to Apply Below
NVIDIA Gruppe is seeking a talented engineer to lead timing analysis and closure for advanced GPUs and CPUs. You will collaborate with cross-functional teams to devise timing closure strategies and will leverage your expertise to enhance our innovative projects.
The ideal candidate possesses a BS in Electrical or Computer Engineering with 5 years of relevant experience, including strong skills in Static Timing Analysis and timing closure processes. Excellent benefits and equity opportunities await.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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