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Senior Clocks ASIC Design Engineer – RTL/Clocking
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-18
Listing for:
NVIDIA Gruppe
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
NVIDIA Gruppe in Santa Clara is looking for a talented engineer to join their Clocks team. This role involves architecting clock domains and collaborating with multiple teams to optimize NVIDIA chips for Power, Performance, and Area (PPA).
Ideal candidates should have a BS in Electrical Engineering or equivalent, 3+ years of experience in RTL design, strong skills in Python, and excellent interpersonal abilities. A competitive salary package is offered, ranging from $136,000 to $218,500 depending on level and experience.
NVIDIA is dedicated to fostering a diverse work environment and encourages all qualified candidates to apply.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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