Senior -Speed IO Validation Engineer

Senior High‑Speed IO (HSIO) Validation Engineer

This role is responsible for validating HSIO (PCIe/NVLink) subsystems from start to finish, ensuring they meet specifications and deliver optimal performance on GPU‑accelerated platforms.

• Own HSIO validation of products from test plan development, automation, design for validation, resource planning, coverage metrics, to test execution and bug resolution.
• Coordinate with logic, circuit, board design, simulation, diagnostics, firmware, driver, and marketing teams across time zones to achieve specification compliance and system production readiness.
• Assist in hardware bring‑up and solve tough system‑level issues focused on HSIO.
• Review board schematics, PCB layouts and provide design and component suggestions.
• Ensure interoperability with connected devices and system components in sophisticated interconnect topologies.
• Resolve complex hardware and software HSIO issues on GPU‑accelerated computing platforms.
• Provide engineering support for manufacturing during NPI and MP stages.

• Ability to work on site in a hardware lab 5 days a week.
• BSEE, BSCE, or equivalent engineering degree.
• 6+ years of HSIO validation experience.
• In‑depth knowledge of HSIO protocols (PCIe, Infiniband, Ethernet) and system‑level operation.
• Experience with logic/protocol analyzers and protocol exercisers.
• Proficient with lab equipment (DSOs, BERT, protocol/logic analyzers) and hands‑on post‑Si bring‑up, functional validation, debug, and tuning of HSIO interfaces.
• Excellent verbal and written communication skills.
• Ability to collaborate across teams and suppliers to deliver quality products on tight schedules.
• Understanding of computing architectures.
• Programming experience with scripting languages such as Python.

• Demonstrable experience in PCIe physical‑layer debugging (LTSSM) and familiarity with data‑link and transaction layers.
• In‑depth understanding of PCIe (or similar) protocol and post‑silicon characterization/validation methods.
• Strong knowledge of signal‑integrity concepts, silicon characteristics, and high‑speed/SERDES functional validation.
• Experience with datacenter products (system management, security, networking, storage).
• Background with x86/Arm server architectures and accelerated GPU computing.

Competitive salary ranges (Level 4: $168,000‑$258,750; Level 5: $200,000‑$322,000) based on location and experience, plus equity and a comprehensive benefits package.

Applications accepted until January 13, 2026.

EEO Statement: NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. Discrimination on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law is prohibited.