Senior I​/O Subsystem Architect

We are seeking a Senior I/O Architect for our NVLink chip to chip team. The role involves defining next‑generation communications standards and products based on NVLink technology.

• Research and craft architecture solutions for chip‑to‑chip communication optimizing performance, area, power, security, and resiliency.
• Work with design teams to define interfaces and flows between NVLink C2C blocks and the rest of the chip.
• Architectural modeling, validation, definition, and documentation.
• Drive implementation across design, verification, firmware, and software teams.
• Collaborate with multi‑functional teams including IP, SoC, physical/package design, firmware, electrical design, and validation to enhance interconnect technology.

• MS or PhD in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience).
• 10+ years of experience in architecture, design, and verification.
• Proven experience in link‑layer architecture (transaction layer, data link layer, physical layer).
• Experience with existing interconnects such as PCIe, UCIE, Chip‑to‑Chip links and knowledge of industry standard protocols CHI, CXL, AXI.
• Ability to define system architecture with NVLink‑C2C interconnects and the surrounding software stack.
• Experience leading projects from concept through product lifecycle, including pathfinding, prototyping, and deployment.
• Skill in evaluating and trading off technical solutions to meet platform requirements for current and future products.

Base salary range: $224,000 – $356,500 for Level5; $272,000 – $431,250 for Level
6. Eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.