FPGA Validation Engineer: Lead -up & Timing; Xilinx

Dexian DISYS is looking for an FPGA Hardware Validation Engineer in Santa Clara, CA. The role involves developing FPGA validation platforms and debugging complex hardware/firmware issues. Key responsibilities include designing FPGA architectures, leading board-level integration and timing closure, and conducting hardware debugging.

The ideal candidate has experience with Xilinx Ultra Scale/Versal, proficiency in Verilog/System Verilog, and strong communication skills. A BS/MS in Electrical or Computer Engineering is preferred. This is a long-term contract position with competitive pay.