Sr. Engineer, Package Design

About Si Time

SiTime is the Precision Timing company. Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.

Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit:

The Senior Semiconductor Package Engineer is responsible for the specification, design, development, and qualification of unique custom packaging technology for SiTime’s revolutionary MEMS-based timing products. Packaging technologies include QFN, WLCSP, ceramic, substrate-based, and multi-chip/package modules, all of which incorporate custom-designed MEMS and CMOS components.

• Develop new packaging technology for SiTime’s MEMS-based timing solutions
• Lead activities for package design, development, and release-to-production
• Develop, manage, and analyze DoEs running locally and overseas
• Manage development activities at OSATs
• Work with OSATs to prototype and test new custom package designs
• Ensure new technologies achieve required performance, reliability, and quality requirements
• Lead troubleshooting activities related to package design or performance

• M.S or PhD. Degree in Mechanical Engineering, Material Science, or other relevant field
• 5+ years’ experience in semiconductor IC packaging technology and methodology
• Experience managing overseas OSATs to bring products into production
• Knowledge of leadframe-based, flip-chip, and substrate-based packages
• Experience with flip-chip and bumping technologies
• Understanding of thermal, stress, and electrical considerations in package design
• Hands‑on experience with CAD software (AutoCAD preferred but not required)
• The desire to work in a fast‑paced, challenging, and risk‑taking environment

• Understanding of thermal, mechanical, and electrical modeling for semiconductor packages
• Understanding of material characterization techniques (DMA, TMA, TGA, etc.)

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent. The annual base salary range for this role is $ - $. The final offer is determined by factors such as location, experience, education, and training. In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact.

We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time‑off plans.

SiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law.

SiTime participates in the E-Verify program.

• Innovation on Top – Philosophies of Innovation with Rajesh Vashist
• Fabrication Knowledge – An Interview with Rajesh Vashist
• SiTime Corporation – You Tube