Sr Electronic Design Verification Test; EDVT Engineer Hardware

We are seeking a highly skilled and motivated Senior to Principal EDVT Engineer to join our hardware engineering team. In this role, you will lead the end‑to‑end design verification, validation, and testing of complex electronic systems, high‑speed interfaces, and power delivery networks. You will be instrumental in bridging the gap between hardware design and mass production, ensuring our products meet the highest standards of signal integrity, power integrity, and regulatory compliance.

If you thrive in a fast‑paced environment, love troubleshooting complex hardware anomalies, and want to own the verification strategy for next‑generation hardware, we want to hear from you.

• Test Strategy & Execution: lead the development, execution, and optimization of EDVT test plans for complex circuit boards (PCAs) and full‑system hardware.
• Signal & Power Integrity: perform rigorous hands‑on validation of high‑speed interfaces (PCIe, USB, DDR, I2C, SPI) and power delivery networks (DC‑DC converters, ripple, transient response).
• Cross‑Functional
  
  Collaboration:
  
  partner closely with Hardware Design, Signal Integrity, Firmware, and Component Quality teams to root‑cause design issues and validate fixes.
• Lab Automation: design and implement automated test setups using Python or LabVIEW to increase test coverage, repeatability, and efficiency.
• Failure Analysis: utilize advanced lab equipment to debug complex hardware anomalies, component failures, and unexpected system behaviors during EVT and DVT phases.
• NPI & Manufacturing Support: collaborate with contract manufacturers (CMs) and Joint Development Manufacturers (JDMs) to transition products from prototype to mass production.
• Documentation: author comprehensive test reports, white papers on critical design bugs, and validation summaries for executive and engineering review.

• Education:
  
  Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• Experience:
  
  5+ years of hands‑on experience in electronic product validation, EDVT, or hardware design engineering.
• Technical Mastery: deep understanding of hardware architecture, schematic design reading, and PCB layouts.
• Lab Expertise: expert‑level proficiency with high‑speed digital oscilloscopes, spectrum analyzers, protocol analyzers, logic analyzers, and digital multimeters.
• Automation: strong scripting skills in Python (or similar languages) for test automation and data analysis.
• Problem Solving: proven track record of debugging complex physical‑layer and system‑level issues under tight timelines.
• Communication: exceptional verbal and written communication skills, with the ability to distill complex technical findings into actionable insights for cross‑functional teams.

• Experience with automated test frameworks and data visualization tools.
• Familiarity with environmental testing (thermal, shock/vibe) and compliance standards (EMI/EMC, safety).
• Experience managing or guiding junior test engineers or technicians.

• Impact: you will have direct ownership of product quality and reliability for cutting‑edge technology.
• Culture: a collaborative, engineering‑first environment where continuous learning and innovation are celebrated.
• Growth: opportunities to expand your scope into hardware architecture, advanced signal integrity simulation, or engineering leadership.

$ – $ per year, depending on qualifications, experience, and work location. Compensation may include restricted stock units and a bonus. Please see our employee benefits for additional information.

We are committed to providing reasonable accommodations for all qualified individuals with a disability. If you require assistance or accommodation due to a disability or special need, please contact accomm

Palo Alto Networks is an equal opportunity employer. We celebrate diversity and all qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or other legally protected characteristics.

All your information will be kept confidential according to EEO guidelines.

Is role eligible for Immigration Sponsorship? Yes