Senior Verification Engineer - Hardware

NVIDIA is hiring a Senior Verification Engineer for its Emulation division, located onsite in Santa Clara, CA.

• Support multiple emulation environments using the latest techniques such as C/C++ DPI Transactors, SV assertions, coverage, power estimation, Speed Bridges, and Accelerated UVM Test benches.
• Bring up SOCs on emulation and root‑cause SoC/Processor test failures and emulator environment issues.
• Collaborate continuously with Design, DV, Power, Silicon Validation, Performance, and Software teams.
• Lead emulation vendors to debug issues using various tools.

• M.S. (or equivalent) in Electrical Engineering, Computer Science, Computer Engineering, or related field.
• 3+ years of proven experience in verification.
• Proficiency in Verilog and/or VHDL, C/C++, and System Verilog.
• Experience with UVM verification environments and scripting in Perl, Python, and C/C++.
• Familiarity with hierarchical design approach, top‑down design, and SoC/system‑level verification.

This role is based onsite at our Santa Clara, CA office.

Base salary ranges: $168,000 – $264,500 for Level4 and $196,000 – $310,500 for Level
5. Eligible for equity and a comprehensive benefits package.

NVIDIA is committed to fostering an inclusive work environment and is an equal‑opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.