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Senior ASIC DFT Timing Engineer - Equity Eligible
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-19
Listing for:
NVIDIA Corporation
Full Time
position Listed on 2026-06-19
Job specializations:
-
Engineering
Hardware Engineer, Systems Engineer
Job Description & How to Apply Below
NVIDIA Corporation is seeking a DFT Timing Engineer in Santa Clara, California. The role involves driving timing analysis and closure for DFT logic across all NVIDIA chips at all hierarchical levels.
The ideal candidate will have a BS in Electrical or Computer Engineering with over 5 years of relevant experience in Static Timing Analysis. The position offers a competitive salary, eligibility for equity, and additional benefits.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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