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Senior ASIC Verification Engineer – Network Security
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-20
Listing for:
Palo Alto Networks
Full Time
position Listed on 2026-06-20
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Palo Alto Networks in Santa Clara is seeking a Design Verification Engineer to ensure that ASICs for next-generation firewalls meet industry-leading standards. Candidates should possess at least 5 years of experience in ASIC design verification and strong skills in System Verilog and UVM.
The role involves collaborating with various teams to create verification methodologies, architecting test benches, and automating verification tasks using Python. Attractive compensation and benefits are provided, ensuring a supportive work environment.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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