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DFT Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-24
Listing for:
Lorven Technologies Inc.
Full Time
position Listed on 2026-06-24
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Our client is looking for a Fulltime DFT Engineer for a project in Santa Clara, CA (Onsite). Below are the details.
Job Title:DFT Engineer Required
Skills & Qualifications
- 5+ years of hands‑on experience in DFT and ATPG for SoC or ASIC design
- Strong understanding of DFT fundamentals including cont rollability, observability, and scan‑based testing
- Proven expertise in ATPG pattern generation, analysis, and debugging
- Experience with MBIST, including memory test architectures and diagnostics
- Knowledge of IO test methodologies for interface and pin‑level validation
- Solid understanding of clock DFT and clock verification concepts
- Strong grasp of digital design and RTL fundamentals
- Experience with industry standard DFT/ATPG EDA tools
- Ability to work effectively in fast‑paced, high‑performance semiconductor programs
- Strong analytical, problem‑solving, and communication skills
- Familiarity with the Siemens suite of DFT
- DFT insertion for SCAN (with SSN) and MBIST repair implementation and verification
- Generating collaterals for test timing and placement and routing
- Expertise in IJTAG 1687 standard and understanding ICL and PDL standards
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