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Senior FPGA Architect - MEMS Timing, Equity
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-06-24
Listing for:
Sitime-Corporation
Full Time
position Listed on 2026-06-24
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
SiTime-Corporation is seeking a Principal FPGA Design Engineer based in Santa Clara, CA. This role involves designing FPGA-based platforms and leading technical initiatives to support our MEMS timing products. Candidates should have over 10 years of experience in FPGA architecture, along with expertise in Verilog/VHDL and high-speed interfaces.
We offer a competitive salary range of $164,800 - $226,600, plus bonuses and equity grants. Additional benefits include health and wellness plans, a 401k, and more.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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