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Digital Design Engineer: -Speed ASICs & Baseband

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-06-28
Job specializations:
  • Engineering
    Systems Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 146711 - 161200 USD Yearly USD 146711.00 161200.00 YEAR
Job Description & How to Apply Below
Position: Digital Design Engineer: High-Speed ASICs & Baseband

Qualcomm in Santa Clara is seeking an engineering professional to design and evaluate high-speed digital and baseband designs. The role involves collaboration across multiple engineering disciplines to define platform requirements and document designs.

The ideal candidate should possess a Master's degree in Electrical Engineering or a related field and have a solid understanding of engineering fundamentals. The position supports design reviews and project meetings, contributing to the entire product cycle from design to manufacturing.

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