Intermediate Semiconductor Process Engineer

Intermediate Semiconductor Process Engineer

Intermediate Semiconductor Process Engineer needed for a 12‑month contract‑to‑hire opportunity with Yoh's client located in Santa Clara, California.

Pay Rate: $45 to $53 per hour

• Solid interpersonal skills
• Strong analytical skills
• Ability to quickly adapt to change

• Design, collect data, analyze and compile reports on process engineering experiments for defect reduction, within safety guidelines.
• Troubleshoot defect problems, perform Root Cause Analysis and resolve moderately difficult process engineering issues.
• Implement new technology, products and analytical instrumentation to support the defect study.
• Design the failure analysis (FA) DOE for key defect critical components to troubleshoot wafer defect issues on R&D programs and major customer escalation.
• Perform the FA, collect and analyze data within safety guidelines.
• Communicate FA observations and recommend solution paths in defect troubleshooting.
• Measure wafer defect/film properties, organize data/reports for review to support defectivity improvement by SEM/FIB.
• Prepare wafers for experimentation, including cleaning, loading wafers, preparing klarf files; evaluate and recommend performance of process system.
• Operate scanning electron microscope (SEM) for top view or critical dimension and energy dispersive spectroscopy (EDS) analysis; identify patterns of interest and optimize conditions.
• Prepare samples for Focused Ion Beam (FIB) lamella making using Zeta Marking tool; optimize sample prep procedures and identify cutting location.
• Operate and check performance of equipment to perform sample prep process, under limited supervision.
• Understand SEM and FIB principles.
• Operate FIB for making TEM lamella when required; identify patterns of interest and optimize conditions.
• Perform SEM/FIB system software alignment functions; routine maintenance procedures (flash, plasma clean).
• Perform routine shutdown procedures; identify problems, put tool down and call for service.
• Coordinate instrument repair and maintenance; coordinate with engineering on wafer evaluations.
• Order equipment and supplies; coordinate with vendors and purchasing.
• Report and communicate wafer defect analysis results; recommend solution paths for wafer defect troubleshooting on key R&D programs.
• Interact with vendors/suppliers to evaluate/troubleshoot latest defect metrology tools (SEM, EDX, FIB, wafer scribing).
• Develop and publish best known method (BKM) procedures including sample prep, SEM conditions, and special sample handling.
• Generate internal documentation for products, presentations and technical reports.

• Provide trainings for junior engineers for wafer preparation/analysis on defect metrology tools.
• Contribute and manage the metrology tool (Zeta/SEMVision) operation.
• Interface with requestors, understand detailed requirements, and communicate on results.
• Help lab monitor wafer in process (WIP) and maintain quality, turnaround time, and throughput.
• Define and forecast defect metrology tool requirements to support N+ defect requirement.

• Experience in semiconductor industry: 1–2 years.
• Minimum two years of college (Associate's Degree).

• Medical, Dental & Vision Benefits (for employees working 20+ hours per week).
• Health Savings Account (HSA) (for employees working 20+ hours per week).
• Life & Disability Insurance (for employees working 20+ hours per week).
• Met Life Voluntary Benefits.
• Employee Assistance Program (EAP).
• 401K Retirement Savings Plan.
• Direct Deposit & weekly e-payroll.
• Referral Bonus Programs.
• Certification and training opportunities.

Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

For California applicants, qualified applicants with arrest or conviction records will be considered for employment in accordance with the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act. All of the material job duties described in this posting are job duties for which a criminal history may have a direct, adverse, and negative relationship potentially resulting in the withdrawal of a conditional offer of employment.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

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