ASIC Methodology Engineer
Listed on 2026-07-14
-
Engineering
Systems Engineer, Test Engineer, AI Engineer (Applied/Software), Hardware Engineer
Company
Qualcomm Technologies, Inc.
Job AreaEngineering Group, Engineering Group > ASICS Engineering
General SummaryThe DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal and external EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology, and IP, and foundation IP development.
AboutThe Role
As a member of the DTECH Methodology team, you will work closely with core and SOC teams to enable a state‑of‑the‑art design analytics platform. Your work will have a consequential impact on the power, performance, area, and quality of Qualcomm’s products.
Required For This Role- M.S/Ph.D. degree in Electrical Engineering or Computer Science with 1‑2 years of relevant experience with ASIC/VLSI design tools and flows
- Strong programming skills in Python
- Hands‑on experience with static timing analysis (STA) tools, e.g., Prime Time and Tempus
- Problem‑solving and analytical mindset
- Critical thinking with good software architecture understanding to develop platforms at scale
- Familiarity with GenAI models (e.g., LLMs such as GPT, Liama, etc.) and their application in real‑world solutions, such as chatbots, etc.
- Experience designing and developing agentic AI systems
- Experience with version control tools like Perforce or Git
- Experience with place & route tools and a good understanding of the ASIC RTL‑GDSII design flow
This role requires the candidate to be onsite in San Diego or Santa Clara, CA.
Minimum Qualifications- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑ or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.
Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
$ - $
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus).
In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).