Senior Technical Lead - Silicon Platform Validation, Python

Senior Technical Lead - Silicon Platform Validation, Python

Santa Clara, California

The Role:

As a Substrate Design Engineer, you will be at the heart of our hardware development cycle. You will own the physical design and layout of IC packaging substrates, working cross-functionally with silicon designers, system architects, SI/PI engineers, and manufacturing partners (OSATs) to deliver high-performance, cost-effective packaging solutions.

What You'll Do (Key Responsibilities):

• Lead the end-to-end design and layout of advanced packaging substrates, including FCBGA, WLCSP, SiP, and 2.5D/3D advanced packages.
• Conduct package feasibility studies, bump/ball map assignments, layer count estimations, and routing evaluations.
• Perform Design Rule Checks (DRC) and Design for Manufacturing (DFM) verification to ensure high yield and reliability.
• Collaborate closely with Signal Integrity (SI) and Power Integrity (PI) teams to optimize layout for high-speed signals, thermal performance, and power delivery.
• Work directly with substrate suppliers and OSATs to align on manufacturing capabilities, design rules, and seamless tape-out execution.
• Maintain and develop library components, design constraints, and methodologies to streamline the design process.

What We're Looking For (Qualifications):

• Education:
  
  Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Materials Science, or a related field.
• Experience:
  
  [3+] years of hands-on experience in IC package/substrate design.
• Tools:
  High proficiency with industry-standard EDA tools such as Cadence APD/SIP/Allegro, Siemens/Mentor Xpedition, or Zuken CR-8000.
• Technical Knowledge:
  Deep understanding of substrate manufacturing processes, design rules, and materials.
• Cross-Domain Awareness:
  Strong foundational knowledge of electrical engineering principles (impedance control, crosstalk, power delivery networks).
• Communication:
  Excellent problem-solving skills and the ability to collaborate effectively with global cross-functional teams.
• Preferred
  
  Skills:
  
  Experience with high-speed interface routing (PCIe Gen 5/6, 112G Ser Des, DDR5, HBM). Familiarity with scripting languages (Python, SKILL, Tcl, Perl) for design automation and workflow optimization.

Compensation and Benefits

A candidate's pay within the range will depend on their skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program;

401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year.