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PLL Characterization Engineer--Speed IO & Timing; Equity
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-07-22
Listing for:
NVIDIA
Full Time
position Listed on 2026-07-22
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
NVIDIA is seeking a senior PLL characterization engineer in Santa Clara to lead post‑silicon validation of high‑speed IOs and PLLs. You will develop automated ATE programs, work with DFT, and analyze large datasets to drive silicon from bring‑up to mass production.
The role requires deep PLL knowledge, extensive hands‑on testing experience, and strong Java/C++ automation skills, with collaboration across design, systems, and product teams. Equity and benefits are included.
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