ASIC Design Engineer - College Grad

We are now looking for a Logic Design Engineer.

As a member of our CPU Logic Design Team, you will be responsible for CPU on‑chip interconnect network, coherency and last‑level caches, focusing on micro‑architectural definition, RTL coding, logic debug, synthesis and timing closure, and supporting verification and implementation. This position offers real impact in a dynamic, technology‑focused company working on consumer graphics, self‑driving cars and artificial intelligence.

• Own and be responsible for crafting and timely delivery of a specific unit on the chip.
• Write readable, high‑performance and low‑power RTL, perform synthesis and timing closure, and produce design documentation.
• Collaborate with the verification team to validate the correctness of your unit.
• Work with implementation to achieve timing, area, performance and power goals.
• Assist with timing closure of super units.

• Recent graduate with a BS or MS Degree in Electrical Engineering, Computer Engineering or Computer Science (or equivalent experience).
• Experience in processor or other related high‑performance semiconductor designs.
• Verilog expertise and deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor‑planning, ECO, bring‑up and lab debug.
• Effective communication and interpersonal skills, with a track record of mentoring junior engineers and interns.
• Strong background in computer architecture, cache coherency or high‑speed interconnects.

Your base salary will be determined based on location, experience, and peer pay. The base salary range is $100,000 – $166,750 for Level 1 and $116,000 – $189,750 for Level 2. You will also be eligible for equity and benefits.

NVIDIA is committed to fostering an inclusive work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Applications for this job will be accepted at least until July 21, 2026.