Senior DFT Timing Engineer ASIC/SoC
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-07-22
Listing for:
NVIDIA
Full Time
position Listed on 2026-07-22
Job specializations:
-
Engineering
Automation & Mechatronics Engineer, Electronics Engineer, Quality Engineering
Job Description & How to Apply Below
NVIDIA is seeking a motivated DFT-Timing Engineer to join our team in Santa Clara, CA. You will drive timing analysis and closure for DFT logic across GPUs, CPUs, DPUs, LPUs, and SoCs at all hierarchical levels, working with PD, DFX, Clocks, and other groups to define timing constraints and implement ECOs.
You will also develop and refine timing strategies and automation, helping push resilience and standardization across projects while contributing to NVIDIA’s ongoing leadership in AI and
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×