ASIC Physical Design & Timing Engineer — Drive Chip Closure
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-07-26
Listing for:
NVIDIA Corporation
Full Time
position Listed on 2026-07-26
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer, Electrical Engineering
Job Description & How to Apply Below
NVIDIA Corporation in Santa Clara is seeking a skilled engineer for a role focusing on Physical Design and timing analysis of GPUs, CPUs, and SoCs. Candidates should hold a Master's degree in Electrical or Computer Engineering and possess proficiency in Timing and Static Timing Analysis.
The position offers a base salary range between $116,000 - $189,750 for Level 2 and $136,000 - $218,500 for Level 3, along with equity and other benefits.
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