Senior STA Engineer – Low-Power SoC Timing & Synthesis
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-07-30
Listing for:
Qualcomm
Full Time
position Listed on 2026-07-30
Job specializations:
-
Engineering
Job Description & How to Apply Below
Qualcomm Atheros, Inc. is seeking a senior role focused on static timing analysis, synthesis, and low‑power implementation for complex WiFi SoCs.
The position requires hands‑on experience with Prime Time, Design Compiler, Genus, and multi‑corner/multi‑mode timing closure, working with RTL, synthesis, and physical design teams in a dynamic environment. Responsibilities include driving subsystem timing closure, developing SDC constraints, and optimizing I/O budgets, while implementing AI‑driven
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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