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Lead Engineer, Systems Engineer, Automation & Mechatronics Engineer

Job in Santa Clara, Santa Clara County, California, 95050, USA
Listing for: Quest Global
Full Time position
Listed on 2026-08-05
Job specializations:
  • Engineering
    Systems Engineer, Automation & Mechatronics Engineer
Salary/Wage Range or Industry Benchmark: 130000 - 140000 USD Yearly USD 130000.00 140000.00 YEAR
Job Description & How to Apply Below

Senior Physical Design Engineer

Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the contributions of diverse individuals and their areas of expertise, we are able to solve problems better, faster. This multi-dimensional approach enables us to solve the most critical and large-scale challenges across the aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor industries.

The achievers and courageous challenge-crushers we seek, have the following characteristics and skills:

We are looking for a Senior Physical Design Engineer with 8–14 years of experience to lead and execute RTL to GDSII implementation for low power SoCs on advanced nodes. This role demands deep expertise in Synopsys Fusion Compiler, strong scripting and automation, and a proven track record of achieving best-in-class PPA.

What You Will Do:

  • Drive physical design flow: synthesis, floor planning, CTS, routing, timing closure.
  • Deliver low power designs using advanced UPF methodologies on 5nm/3nm nodes.
  • Resolve SoC/SS integration challenges including SDC constraints and UPF promotion/pushdown.
  • Develop and maintain automation flows using Tcl, Python, and Shell.
  • Collaborate with cross-functional teams for design closure and signoff.
  • Mentor and lead junior team members.
  • Innovate and contribute to flow/methodology improvements.

What You Will Bring:

  • B.Tech/M.Tech in ECE, EE, or VLSI.
  • 8–14 years hands-on physical design experience.
  • Expert in Fusion Compiler, low power design, and PPA optimization.
  • Strong scripting skills (Tcl/Python/Shell).
  • Good understanding of SoC hierarchy, signoff flows, and constraint management.
  • Excellent problem-solving, communication, and leadership skills.

Preferred:

Experience in top-level SoC integration, signoff tools (PT, ICV), and DFM check.

Pay range: $130K- $140K

Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer a comprehensive benefits package, including health insurance, paid time off, and retirement plan.

Benefits:

  • 401(k)
  • 401(k) matching
  • Dental insurance
  • Health insurance
  • Life insurance
  • Paid time off
  • Referral program
  • Vision insurance
  • Short/Long Term Disability
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