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Power Delivery and Power Integrity Architect

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-09-12
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 180500 - 270700 USD Yearly USD 180500.00 270700.00 YEAR
Job Description & How to Apply Below

Qualcomm Technologies, Inc.

Job Area:
Engineering Group, Engineering Group >
Systems Engineering

General Summary

Qualcomm Data Center team is developing high‑performance, energy‑efficient server solutions for data center applications. The team focuses on creating reference platforms based on Qualcomm’s Snapdragon SoC, delivering comprehensive solutions that include hardware, software, reference designs, user guides, SDKs, and more.

Position:
Power Delivery and Power Integrity Architect

As an experienced Power Delivery and Power Integrity Architect (individual contributor), you will work closely with the platform team and cross‑functional teams—including software, firmware, circuit design, packaging, platform engineering, memory vendors, product management, and component suppliers—to define, analyze, simulate, and verify end‑to‑end power delivery and power integrity solutions from die to system level.

Key Responsibilities
  • Collaborate with SoC, firmware/software, memory vendors, component suppliers, packaging, platform engineering, and system design teams to define and implement power architectures that meet internal and customer requirements.
  • Lead voltage regulator (VR) design specification, selection, and co‑development with VR suppliers.
  • Develop E2E VR + PDN simulation flows to reduce time to market.
  • Perform PDN modeling, simulation, and characterization for SoC, package, PCB, VRs, and LDOs.
  • Provide PI‑driven feedback to SoC design teams to influence decap, package, and power rail architecture.
  • Create power maps, power tree and power‑flow diagrams, and power budgets from die to system level.
  • Develop and provide implementation and system efficiency guidelines.
  • Conduct IR drop, AC, and transient simulations and provide model‑to‑hardware correlations.
  • Define module interfaces and formats for simulation and customer guidelines.
  • Lead PI model creation, end‑to‑end PI simulations (thermal‑aware), and final design development considering heat sink and temperature effects.
  • Leverage ML/AI‑assisted simulation techniques to streamline and automate design and analysis workflows from die to regulators.
  • Prepare and present technical documentation and reports to stakeholders, including engineering teams, senior management, customers, and suppliers.
  • Engage with customers and OEM partners to provide power delivery architecture guidance, PDN design guidelines, and bring‑up support.
  • Troubleshoot system performance and identify areas for improvement.
Qualifications
  • Master’s degree in Electrical Engineering or related field; experience in Power Delivery preferred.
  • Strong experience in Power Integrity (PI).
  • 8+ years of experience in Power Delivery, board‑level VR design, PI analysis, simulation, and PDN measurements.
  • Strong understanding of PI fundamentals, power supply architectures, voltage regulator technologies, chip supply design, and PDNs.
  • Experience developing PI methodologies and PDN modeling from die to system, with model correlation and lab validation.
  • Experience with server, HPC, or data center platform power delivery preferred.
  • Experience with multi‑phase VR design/selection.
  • Proficiency in PI simulation tools (e.g., Simplis/Simetrix, ADS, ANSYS SIwave, HFSS, and Cadence Sigrity PowerDC/PowerSI).
  • Hands‑on experience creating complex PI models and simulations.
  • Proficiency with Unix/Linux environments and EDA tools using scripting.
  • Knowledge of packaging and PCB technologies, design, and manufacturing processes.
  • Knowledge of resonances, droops, IR drop, cooling, temperature effects, and power consumption.
  • Familiarity with 2.5D/3D packaging technologies, including CoWoS, InFo, EMIB, and RDL.
  • Strong experience in VR lab validation.
  • Experience with electrical validation and compliance testing tools (VNAs, oscilloscopes, spectrum…
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