Technical Specialist - Silicon Platform Validation, Python

Technical Specialist - Silicon Platform Validation, Python

We are seeking an experienced SI/PI Engineer to join our Advanced Silicon Packaging team. In this role, you will be responsible for signal integrity and power integrity analysis, modeling, and design optimization of next-generation multi-die packaging architectures including 2.5D/3D integration, silicon interposers, and high-bandwidth memory (HBM) interfaces.

• Perform SI/PI analysis and design optimization for advanced silicon packages (CoWoS, EMIB, chiplet-based architectures, fan-out wafer-level packaging)
• Develop and validate high-speed channel models for package interconnects including bumps, microbumps, TSVs, RDL layers, and silicon/organic interposers
• Conduct full-wave electromagnetic (EM) simulations of package structures to characterize S-parameters, crosstalk, impedance, and insertion/return loss
• Design and optimize Power Distribution Networks (PDN) — including decoupling strategy, IR drop analysis, and AC impedance profiling from die to board
• Perform time-domain simulations (eye diagram, BER analysis) for high-speed serial and parallel interfaces (PCIe Gen5/6, UCIe, HBM3/3E, DDR5, Ser Des >112 Gbps)
• Collaborate with IC design, package substrate design, PCB layout, and thermal/mechanical teams to co-optimize package electrical performance
• Develop and correlate simulation models with lab measurements (VNA, TDR, oscilloscope, power noise measurements)
• Define SI/PI design guidelines and constraints for package substrate stackup, routing rules, and bump/via assignments
• Support design-for-manufacturability (DFM) reviews with OSAT partners and substrate vendors
• Investigate and resolve SI/PI-related failures during silicon bring-up and validation phase

5+ years of experience in SI/PI analysis for semiconductor packaging or high-speed PCB design

Strong proficiency with industry-standard EM and circuit simulation tools: EM Solvers:
Ansys HFSS, Ansys SIwave, Cadence Clarity 3D, Keysight ADS Momentum Circuit Simulation:
Synopsys HSPICE, Cadence Spectre, Keysight ADS PDN Analysis:
Ansys Red Hawk, Cadence Voltus, Sigrity PowerDC/PowerSI

Deep understanding of transmission line theory, Maxwell's equations, and S-parameter analysis

Experience with high-speed interface protocols (PCIe, UCIe, HBM, DDR, Ethernet Ser Des)

Proficiency in package stackup design, impedance control, and via transition optimization

Hands-on experience with measurement correlation (VNA, TDR/TDT, near-field scanning)

Programming/scripting skills (Python, MATLAB, Tcl) for automation and post-processing

A candidate's pay within the range will depend on their skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program;

401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year.