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ASIC Design Verification Engineer

Job in Santa Clara, Santa Clara County, California, 95050, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-08-12
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Electronics Engineer, Test Engineer
Job Description & How to Apply Below

Job Title

Qualcomm ASIC Engineer

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.

Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field.

Preferred Qualifications

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

• 6+ months of experience with architecture and design tools.

• 6+ months of experience with scripting tools and programming languages.

• 6+ months of experience with design verification methods.

Principal

Duties & Responsibilities

• Applies ASIC knowledge to assist and support the defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development for a variety of high performance, high quality, low power products.

• Assists in the creation of architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.

• Collaborates with team members to assist in the development of an implementation strategy that meets system requirements and customer needs.

• Supports the evaluation of process flow from high-level design to synthesis, place and route, and timing and power use, and verification or similarly for custom circuit design/layout flow.

• Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of a specific part of a block/SoC or IC Package.

• Writes technical documentation for EDA/IP/ASIC projects.

Level of Responsibility

• Works under supervision.

• Decision-making affects direct area of work and/or work group.

• Requires verbal and written communication skills to convey basic, routine factual information.

• Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Pay Range and Other Compensation & Benefits

$ - $

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation  also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).

In addition, our highly competitive benefits package is designed to support your success at work, at home, and r recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

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