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Hands-On Memory Subsystem Verification Engineer

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-08-28
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer, Validation Engineer
Salary/Wage Range or Industry Benchmark: 153000 - 230000 USD Yearly USD 153000.00 230000.00 YEAR
Job Description & How to Apply Below

Qualcomm Technologies, Inc. is seeking a Design Verification Engineer to drive memory subsystem verification, including memory controllers, DDR/LPDDR/HBM interfaces, and PHY logic.

You will develop and execute verification strategies, build UVM-based test benches, and write assertions, covering multiple modes and addressing complex verification challenges. The role requires strong Verilog/System Verilog/UVM skills, experience with constrained-random verification, and collaboration with RTL,

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