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Senior Analog & RF Layout Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-01
Listing for:
Capgemini
Full Time
position Listed on 2026-09-01
Job specializations:
-
Engineering
Electronics Engineer
Job Description & How to Apply Below
Capgemini is seeking an experienced Analog / RF Layout Designer to provide onsite support for advanced semiconductor nodes in San Francisco and Santa Clara. You will independently develop block-level and IP-level analog/RF layouts, drive floor planning, placement, and routing, and lead top-level integration across SoCs.
You will apply deep expertise in FinFET and deep sub-micron processes, addressing fabrication, EM, ESD, latch-up and reliability concerns while collaborating with global teams and
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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