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Senior Memory Subsystem Verification Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-02
Listing for:
Nutanix
Full Time
position Listed on 2026-09-02
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Qualcomm Technologies, Inc. is seeking a motivated Design Verification Engineer to join its memory subsystem verification team.
You will develop verification strategies, build UVM-based test benches, and drive coverage closure for high-performance memory interfaces (LPDDR/DDR/HBM) and related PHY logic. The role emphasizes hands-on verification with Verilog, System Verilog, UVM, and SVA, spanning the full verification lifecycle from planning to regression and debug.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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