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DFT Engineer

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: SoftPathTechnologies
Full Time position
Listed on 2026-09-03
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 170000 USD Yearly USD 120000.00 170000.00 YEAR
Job Description & How to Apply Below

DFT Engineer

Office

Location:

Santa Clara, California

Exp: 7+yrs

No Of position:

- 7

must work On softpath W2

Job Description & Skill Requirement:

Required

Skills & Qualifications
  • 5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
  • Strong understanding of DFT fundamentals including cont rollability, observability, and scan-based testing
  • Proven expertise in ATPG pattern generation, analysis, and debug
  • Experience with MBIST, including memory test architectures and diagnostics
  • Knowledge of IO Test methodologies for interface and pin level validation
  • Solid understanding of clock DFT and clock verification concepts
  • Strong grasp of digital design and RTL fundamentals
  • Experience with industry standard DFT/ATPG EDA tools
  • Ability to work effectively in fast paced, high performance semiconductor programs
  • Strong analytical, problem solving, and communication skills
Qualification:

BE

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