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Senior DFT Engineer Soc/Asic: ATPG & MBIST
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-03
Listing for:
SoftPathTechnologies
Full Time
position Listed on 2026-09-03
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Soft Path Technologies is seeking a DFT Engineer in Santa Clara, CA with 7+ years of hands-on experience in DFT/ATPG for SoC/ASIC designs. The role demands strong understanding of cont rollability, observability, and scan-based testing, plus expertise in ATPG pattern generation, MBIST, and IO test methodologies.
You will contribute to clock DFT, RTL fundamentals, and use industry-standard DFT/ATPG tools to drive robust test solutions.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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