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Senior DFT Engineer: Scan Insertion & ATPG Expert
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-04
Listing for:
VGAI Solutions
Full Time
position Listed on 2026-09-04
Job specializations:
-
Engineering
Test Engineer, Quality Engineering
Job Description & How to Apply Below
VGAI Solutions seeks a Senior DFT Engineer to lead scan insertion and ATPG validation efforts within a 12‑month engagement. The role requires 8–12 years of hands-on DFT experience and expertise with industry tools such as Mentor Tessent and Synopsys DFT Compiler.
You will collaborate with design and verification teams, implement DFT methodologies, and drive testability from insertion through sign-off in an ASIC/SoC flow.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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