ASIC Physical Design & Timing Engineer — Drive Chip Convergence
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-09
Listing for:
NVIDIA Gruppe
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer, Electrical Engineering
Job Description & How to Apply Below
NVIDIA Gruppe is looking for a talented engineer specialized in Physical Design and Timing Analysis. The successful candidate will be integral in driving the design and optimization of GPUs, CPUs, and SoCs, ensuring technical excellence through collaboration with multiple teams.
A Master’s degree in Electrical or Computer Engineering is required, alongside strong proficiency in Timing Analysis tools. Competitive salaries ranging from 116,000 to 218,500 USD, plus equity and benefits, are offered.
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