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Power Management Engineer ‑ RISC‑V SoCs

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: SiFive, Inc.
Full Time position
Listed on 2026-09-09
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 206000 - 251000 USD Yearly USD 206000.00 251000.00 YEAR
Job Description & How to Apply Below
Position: Power Management Engineer for High‑Performance RISC‑V SoCs

SiFive is seeking a Power-Management/Reset/Clock Micro-Architect and RTL Design Engineer to pioneer PMU, clocking and power strategies for high-performance RISC-V CPU and SoC IP. You will work on highly-configurable hardware generators, collaborating with architecture, verification, and software teams to deliver fast, reliable hardware.

The role involves microarchitecture development, sandbox verification, and close coordination with physical design to hit frequency and power targets, enabling

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