Senior Director, Board Product Development Engineering

Senior Director, Board Product Development Engineering (Finance)

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world.

Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do your best work. Come join the team and see how you can make a lasting impact on the world.

NVIDIA's advanced datacenter boards push forward chip packaging, PCB fabrication, SMT, assembly, and testing capabilities. Dedicated teams take responsibility for each technology: packaging manages the package, PCB and materials handle fabrication and stack-up, SMT and assembly oversee build processes, and test and SI focus on test capabilities. Dedicated teams take responsibility for each technology: packaging manages the package, PCB and materials handle fabrication and stack-up, SMT and assembly oversee build processes, and test and SI focus on test capabilities.

The challenge is to align these improvements across the stack-from chip to PCB, PCB to SMT, SMT to assembly, and assembly to test. Each domain's innovation delivers maximum benefit when downstream consequences are considered early. The Senior Director, Board PDE oversees integration methods that make this possible-coordinating handoffs, engineering cross-domain effects before changes, and optimizing the entire chain.

• Design, implement, and institutionalize the integration readiness process for all next-generation datacenter board products - owning manufacturing and test readiness end to end so build starts land on schedule and at target yield.
• Guide the functional teams in developing cross-boundary techniques before silicon and stackup freeze occurs. Focus on warpage-tolerant DFM and reflow for next-gen BGA pitch. Manage impedance and CTE control for high-speed stackups. Lock pad-map and fab methods at an early stage.
• Build, lead, and develop a global Board PDE organization across three technical pillars - PCB & Fab, SMT/PCBA, and High-Speed Connector & Signal Integrity.
• Set up integration oversight throughout the chip-to-board stack. Define entry and exit requirements at each domain boundary. Lead the gates to confirm one qualified domain is ready to pass to the next.
• Collaborate with Operations Test Engineering and Signal Integrity to establish test coverage and manufacturing test flow requirements, applying that thoroughness to the tester and diagnostic boards.
• Take charge of reliability and yield performance throughout the stack. Investigate excursions to identify root causes. Address DFx and alternate-component gaps with the factory planning and design teams.
• Support manufacturing partners (CM/ODM/OSAT, substrate, and PCB fab) in producing world-class datacenter products. Serve as the senior chip-to-board representative across NVIDIA's Operations, Engineering, and Executive teams.

• BS in Electrical Engineering, Materials Science, or a related technical field (or equivalent experience); MS or PhD is a plus.
• 15+ overall years in product, manufacturing, or operations engineering for high-complexity electronics. You have 8+ years leading engineering teams and 5+ years leading leaders in a global, cross-matrixed organization.
• A track record of taking complex board and system products from design through NPI to high-volume manufacturing, with clear ownership of schedule, yield, and quality outcomes.
• Comprehensive technical knowledge covering the chip-to-board stack: advanced packaging and flip-chip BGA, high-density and high-layer-count PCB fabrication, SMT and assembly process qualification, and board-level reliability.
• Solid expertise in high-speed signal integrity and manufacturing testing - BERT, channel margining, defining structural and functional test coverage, along with diagnostic and tester board development.
• Demonstrated success building cross-functional processes and sign-off gates that hold up under schedule pressure, with the technical credibility to influence domain owners without owning their qualification.
• Experience collaborating with ODM/CM/OSAT and PCB fab suppliers to qualify new methods before production, rather than just completing existing ones.
• Excellent executive communication - able to distill ambiguous, fast-moving technical information into concise, decision-ready recommendations for technical and non-technical audiences alike.
• Enthusiasm for fast-paced, ambiguous environments where technology changes constantly, and willingness to travel internationally (~20%), primarily to manufacturing partners in Asia.

• Full…