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ASIC Verification and Infrastructure Engineer - GPU

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: NVIDIA
Full Time position
Listed on 2026-09-09
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 160000 USD Yearly USD 120000.00 160000.00 YEAR
Job Description & How to Apply Below

NVIDIA is seeking an ASIC Engineer to support the design and verification of the GPU memory subsystem in the world’s leading SoC's and GPU's – an opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you’ll be doing :
  • As a key member of our GPU memory subsystem’s efficiency team, you will develop and implement solutions focused on infrastructure and process improvements
  • Use industry-standard tools to provide flows that simplify work processes while magnifying the impact of the L2 design and verification teams
  • As a key member of our GPU memory subsystem’s verification team, you will verify a key memory system component of the industry's leading GPUs
  • You will support the verification of the ASIC design, architecture, golden models, and micro-architecture
  • Understand the design and implementation of the unit, define the verification scope, develop the verification infrastructure, and verify the correctness of the design
  • Collaborate with architects, designers, verification engineers, as well as methodology and infrastructure engineers to accomplish your tasks
What we need to see:
  • A bachelor degree in CS, CE, EE or equivalent experience
  • 2+ years of relevant experience
  • A drive for automating processes and creating solutions that are easily integrated into existing tool flows
  • Exposure to computer architecture, ASIC design, and verification methodology is required
  • Experience in pre-silicon verification using design and verif tools (examples include GUIs for wave debug, dgb for code debug)
  • Strong background in
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