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Senior CPU Gate-Level Synthesis Engineer
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-09
Listing for:
Apple Inc.
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Test Engineer
Job Description & How to Apply Below
Apple's Silicon Engineering Group (SEG) is seeking a CPU Gate Level Synthesis Engineer to drive early-stage development of high-performance, low-power CPUs. You will run RTL to gate-level synthesis and seek opportunities to optimize timing, power, and area while collaborating across RTL, physical design and DFT teams.
The role requires a BS and 10+ years in digital logic, RTL synthesis and physical design, with preferred CPU implementation experience and scripting skills in Tcl, Perl or Python.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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