ASIC Efficiency Engineer: Boost PPA, GPUs & Equity
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-09-10
Listing for:
NVIDIA
Full Time
position Listed on 2026-09-10
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
NVIDIA seeks an ASIC Design Efficiency Engineer to innovate HW/RTL for next-generation GPUs and processors across mobile, embedded, and data center platforms. You will contribute to design targets, performance, and power-efficiency enhancements while collaborating with architects and VLSI teams.
The role requires a strong background in HDL, logic design, and system architecture, with a focus on efficient, scalable design methodologies and cross-disciplinary teamwork. #J-18808-Ljbffr
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