×
Register Here to Apply for Jobs or Post Jobs. X

Sr Engineer CAD Pre-Silicon Front End

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Socket.dev
Full Time position
Listed on 2026-09-29
Job specializations:
  • Engineering
    Test Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 180000 - 260000 USD Yearly USD 180000.00 260000.00 YEAR
Job Description & How to Apply Below

Role Overview

Velaura is building custom silicon for Physical and Embodied AI, and we are building it
from a blank sheet. The automation our design and verification engineers use to get
from RTL to a clean handoff shapes how fast that silicon comes together.
You will own the front end automation that carries our silicon from RTL entry to a clean
handoff into DFT and implementation. The scope covers RTL design flows, verification
flows from simulation through prototyping, and the AI assisted tooling built over them.
Success is measured two ways. Front end engineers get more done, and the tools they
rely on stay up through every phase of the design cycle.

Responsibilities
  • Own the RTL design flows including build, lint, CDC and formal checks.
  • Own register generation and the generator driven flows behind interfaces and integration.
  • Own the DV flows including testbench build, regression execution and coverage collection.
  • Own emulation and FPGA prototyping build and bring up.
  • Build and deploy AI assisted tooling across design and verification workflows, working with CAD and Engineering Infrastructure on compute and model access.
  • Keep these flows available through the design cycle, managing tool versions and turning around bug, upgrade and maintenance requests quickly.
  • Measure and improve design and verification productivity, and move proven workflows into standard practice.
  • Partner with DFT and physical design on handoff readiness, owning the DFT side flows that sit in the front end.
Required Qualifications
  • 8 or more years in design verification, design or CAD engineering, including ownership of a flow area.
  • Strong System Verilog and RTL fluency with the ability to read and debug design and testbench code.
  • Hands on experience building and running simulation and regression flows including testbench compile, coverage collection and results triage.
  • Excellent Python skills and a track record of building tools that other engineers maintain.
  • Working knowledge of front end design and verification EDA tools from Synopsys, Cadence or Siemens EDA.
  • Working knowledge of Linux administration, distributed compute such as LSF or Slurm, and the storage and scaling constraints behind large regression workloads.
  • Familiarity with databases and dashboarding tools such as Grafana for tracking flow health and regression metrics.
  • Track record of supporting a live engineering flow with responsive issue turnaround, and the communication skills to work closely with design and verification engineers.
Preferred Qualifications
  • Experience with UVM, cocotb or Python based verification environments.
  • Hands on experience applying LLMs or agentic systems to engineering workflows.
  • Experience taking an SoC from RTL bring up through tapeout.
  • Experience with emulation and FPGA prototyping platforms such as Palladium, Protium, Veloce or HAPS.
  • Experience with retrieval augmented generation, fine tuning or evaluation frameworks for code models.
  • Experience at an early stage semiconductor company.
Why Velaura?

Velaura is building next-generation compute technology for cloud, edge, and Physical AI. Our solutions will enable robots, autonomous systems, drones, and other intelligent machines to operate efficiently in the physical world.
This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape thefuture of Physical AI, we would love to hear from you.

Equal

Employment Opportunity and Accommodations

Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity.

Qualified applicants will receive consideration for employment without regard to race,color, religion, national origin, gender, sexual orientation, gender identity, disability or protected veteran status.

We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mentaldisabilities. Applicants who would like to contact us regarding the accessibility of our website or who need special assistance or a reasonable accommodation for any part ofthe application or hiring process may contact us at: careers. This contact
information is for accommodation…

To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary